腦機(jī)接口植入式微納器件（英文版）

Chapter 1  Introduction
Chapter 2  Micropower biopotential readout circuits
  2.1  Abstract
  2.2  Low-noise bioamplifier with active feedback
  2.3  Micropower fully integrated CMOS readout circuit
  2.4  Low voltage switched-capacitor bioamplifier
  2.5  Summary
Chapter 3  Ultra-low power neural spike detector
  3.1  Introduction
  3.2  Architecture of neural spike detector
  3.3  NEO architecture for neural spike detector
  3.4  Ultra-low power detector experiment results
  3.5  Summary
Chapter 4  An efficient hybrid neural network for spike sorting
  4.1  Introduction of ANN
  4.2  Experiment method of spike sorting
  4.3  Feature extraction of the spike sorting
  4.4  Experiments results of hybrid ANN
  4.5  Summary
Chapter 5  Implantable mixed-signal interface
  5.1  Abstract
  5.2  Compensability mixed-signal interface circuit
  5.3  Intraocular implantable retinal SoC
  5.4  Summary
Chapter 6  High reliability wireless neural recording microsystem
  6.1  Introduction
  6.2  High reliability system architecture
  6.3  Data receiver circuit of recording system
  6.4  Digital transmitter with BIST for recording system
  6.5  Wireless data transfer protocol
  6.6  System measure results
  6.7  Summary
Chapter 7  EMI susceptibility ASIC for biopotential
  7.1  Abstract
  7.2  Low-voltage CMOS bioamplifier with high EMI immunity
  7.3  Chaotic frequency modulation-based EMI hardened
  7.4  Summary
Chapter 8  Achievements and future work